Вообщем отремонтировал . Память живая. Подкинул сабплату с разбора. Хотя прозванивал, сравнивал с родной. Тест проделал. Выложить не смогу - нет доступа. Только так, отредактируйте пожалуйста.
Waiting for mtk usb device... ok
DriverDesc : MediaTek USB Port
DriverPath : usb\vid_0e8d&pid_0003\6&35c31b9d&0&4
DriverSRV : mtk_usbser_{oem116.inf}
DriverVER : 6-10-2014:[2.0.1136.0]
DriverOEM : MediaTek Inc.
● BBChip ID MT6768
● BBChip Inf 707:8A00:CA00:0
● Chip PID Helio G70/G80/G85
● Chip UID Talbot
● Chip Ver CHIP_VER_E1
BRom::SEC:{0xe7}[SBC:ON:SLA:ON
AA:ON]
BRom stage Re-configuration
● BR_MEID:0xE4F3A529E58DA1FA024E79197258759A
Disabling watchdog timer1...
Sending BRom Processor registers
===== Bypass Authentication =====
BRom::WinUSB:
evHnd{0x18c1efb0}
Dumping Dram data(0x10370400)...
Re-connecting to BootROM...
BRom::SEC:{0x0}[SBC:OFF:SLA:OFF
AA:OFF]
BRom::SEC:{0x0}[SBC:OFF:SLA:OFF
AA:OFF]
Download 1st DA-Preloader...
Booting Download Agent at(0x200000)...
Jump to 1st DA...
Successfully received DA sync cahr
Start setup da environment...
Setup da device enviroment...
LOG_RAW : cmd_set_hw_init_parameter finish.
DA build time : Mar 9 2020 21
LOG_RAW : ***1.Enter DA_init.***
LOG_RAW : ***1-1.heap_init.***
LOG_RAW : ***1-2.pll_init_pass.***
LOG_RAW : ***2.platform_early_init.***
LOG_RAW : 2-1.disable watch dog.
LOG_RAW : 2-2.disable_Charger.
LOG_RAW : ***3.init system objects.***
LOG_RAW : ***4.It is BROM MODE.***
LOG_RAW : ***5.sync with PC Pass.***
LOG_RAW : time2-time1=104
LOG_RAW : ***6.gpt_init pass.***
LOG_RAW : SRAM_DELSEL_ADDR = 0x1020d00c, SRAM_DELSEL_VAL = 0x6c4e4f3
LOG_RAW : [PWRAP] First Valid Sampling Clock Found!!!
LOG_RAW : [PWRAP] si_en_sel = 0, si_ck_sel = 1
LOG_RAW : [PWRAP] si_sample_ctrl = 20, rdata = 5aa5
LOG_RAW : [PWRAP] Data Boundary is Found !!!
LOG_RAW : [PWRAP] si_dly = 6, rdata = 1a65
LOG_RAW : [PWRAP] si_sample_ctrl=0x20(before)
LOG_RAW : [PWRAP] si_sample_ctrl=0x40(after)(non-FPGA)
LOG_RAW : [PWRAP] SI Strobe Calibration For PMIC 0 Done
LOG_RAW : [PWRAP] si_sample_ctrl = 40, si_dly = 6
LOG_RAW : [PWRAP] Read Test pass, return_value = 0x0
LOG_RAW : [PWRAP] Write Test pass
[PWRAP] REC_CMD0 : 0xa08 (The last one adr)
[PWRAP] REC_WDATA0 : 0x0 (The last one wdata)
[PWRAP] REC_CMD1 : 0x5c2 (The second-last adr)
[PWRAP] REC_WDATA1 : 0x1 (The second-last wdata)
[PWRAP] REC_CMD2 : 0x588 (The third-last adr)
[PWRAP] REC_WDATA2 : 0x4321 (The third-last wdata)
LOG_RAW : [PMIC]Preloader Start
LOG_RAW : [PMIC] CHIP Code = 0x5820
[PMIC]POWER_HOLD : 0x1
LOG_RAW : [PMIC]TOP_RST_STATUS[0x152]=0x4f
LOG_RAW : [PMIC]PONSTS[0xc]=0x4
LOG_RAW : [PMIC]POFFSTS[0xe]=0x2000
LOG_RAW : [PMIC]PG_SDN_STS0[0x16]=0xffff
LOG_RAW : [PMIC]PG_SDN_STS1[0x18]=0xfc00
LOG_RAW : [PMIC]OC_SDN_STS0[0x1a]=0x0
LOG_RAW : [PMIC]BUCK_OC_SDN_STATUS[0x1332]=0x0
LOG_RAW : [PMIC]BUCK_OC_SDN_EN[0x1346]=0x15ff
LOG_RAW : [PMIC]THERMALSTATUS[0x1c]=0x0
LOG_RAW : [PMIC]STRUP_CON4[0xa1c]=0x0
LOG_RAW : [PMIC]TOP_RST_MISC[0x14c]=0x1200
LOG_RAW : [PMIC]TOP_CLK_TRIM[0x388]=0x6cc0
LOG_RAW : latch VPROC11 800000 uV(0x28)
LOG_RAW : latch VPROC12 800000 uV(0x28)
LOG_RAW : latch VSRAM_PROC11 900000 uV(0x60)
LOG_RAW : latch VSRAM_PROC12 900000 uV(0x60)
LOG_RAW : latch VCORE 800000 uV(0x28)
LOG_RAW : latch VSRAM_OTHERS 900000 uV(0x60)
LOG_RAW : latch VMODEM 800000 uV(0x28)
LOG_RAW : latch VSRAM_GPU 900000 uV(0x60)
LOG_RAW : latch VGPU 800000 uV(0x28)
LOG_RAW : [pmic_check_rst] PWRKEY short press
LOG_RAW : [PMIC]just_rst = 0
LOG_RAW : No EFUSE SW Load
LOG_RAW : bat is exist.
LOG_RAW : [pmic_wdt_set] TOP_RST_MISC=0x1221
LOG_RAW : register vsram_others OK
LOG_RAW : register vsram_proc11 OK
LOG_RAW : register vsram_proc12 OK
LOG_RAW : register vsram_gpu OK
LOG_RAW : register vcore OK
LOG_RAW : register vproc11 OK
LOG_RAW : register vproc12 OK
LOG_RAW : register vgpu OK
LOG_RAW : register vmodem OK
LOG_RAW : register vdram1 OK
LOG_RAW : register vdram2 OK
LOG_RAW : register vio18 OK
LOG_RAW : [PMIC]Init done
LOG_RAW : [RTC]rtc_enable_dcxo con = 0x486, osc32con = 0xde6c, sec = 0x2400
[RTC]get_frequency_meter : input=0x0, ouput=5
[RTC]get_frequency_meter : input=0x0, ouput=5
[RTC]get_frequency_meter : input=0x0, ouput=3975
LOG_RAW : [RTC]rtc_init#1 powerkey1 = 0xa357, powerkey2 = 0x67d2, without LPD
LOG_RAW : [RTC]bbpu = 0x1, con = 0x486, osc32con = 0xde6c, sec = 0x2400, yea = 0xc502
LOG_RAW : [RTC]rtc_init#2 powerkey1 = 0xa357, powerkey2 = 0x67d2
LOG_RAW : [RTC]rtc_init Writeif_unlock
LOG_RAW : [RTC]switch to dcxo
[RTC]eosc_cali : RG_FQMTR_CKSEL=0x42
[RTC]get_frequency_meter : input=0xf, ouput=842
[RTC]eosc_cali : val=0x34a
[RTC]get_frequency_meter : input=0x7, ouput=715
[RTC]eosc_cali : val=0x2cb
[RTC]get_frequency_meter : input=0xb, ouput=779
[RTC]eosc_cali : val=0x30b
[RTC]get_frequency_meter : input=0xd, ouput=811
[RTC]eosc_cali : val=0x32b
[RTC]get_frequency_meter : input=0xc, ouput=795
[RTC]eosc_cali : val=0x31b
LOG_RAW : [RTC]EOSC cali val = 0xde4c
LOG_RAW : [RTC]RTC_SPAR0=0x0
LOG_RAW : [RTC]XO_XMODE_M = 1 , XO_EN32K_M = 1
LOG_RAW : [RTC]32k-less mode
LOG_RAW : [RTC]rtc_2sec_reboot_check 0x2400, without 2sec reboot, type 0x2
LOG_RAW : [RTC]rtc 2sec reboot is not enabled
LOG_RAW : [RTC]rtc_lpd_init RTC_CON=0x486
LOG_RAW : [PMIC] pmic_init_setting end. v181122
LOG_RAW : [MT6358] 1 8,40
LOG_RAW : [MT6358] get volt 0, 64, 0, 900000
LOG_RAW : vsram_others = 900000 uV
LOG_RAW : [MT6358] get volt 1, 64, 0, 900000
LOG_RAW : vsram_proc11 = 900000 uV
LOG_RAW : [MT6358] get volt 2, 64, 0, 900000
LOG_RAW : vsram_proc12 = 900000 uV
LOG_RAW : [MT6358] get volt 3, 64, 0, 900000
LOG_RAW : vsram_gpu = 900000 uV
LOG_RAW : [MT6358] get volt 4, 48, 0, 800000
LOG_RAW : vcore = 800000 uV
LOG_RAW : [MT6358] get volt 5, 48, 0, 800000
LOG_RAW : vproc11 = 800000 uV
LOG_RAW : [MT6358] get volt 6, 48, 0, 800000
LOG_RAW : vproc12 = 800000 uV
LOG_RAW : [MT6358] get volt 7, 48, 0, 800000
LOG_RAW : vgpu = 800000 uV
LOG_RAW : [MT6358] get volt 8, 40, 0, 750000
LOG_RAW : vmodem = 750000 uV
LOG_RAW : ***7.pmic_init pass.***
LOG_RAW : [RGU-PL] EMI_DCS_SUCCESS 0
LOG_RAW : [RGU-PL] DVFSRC_SUCCESS 0
LOG_RAW : [DDR Reserve] ddr reserve mode not be enabled yet
LOG_RAW : ***8.release_dram pass.***
LOG_RAW : ***9.platform_init start.***
[RGU-PL] MODE : 0x0
[RGU-PL] STA : 0x0
[RGU-PL] LENGTH : 0xffe0
[RGU-PL] INTERVAL : 0xfff
[RGU-PL] SWSYSRST : 0x8000
[RGU-PL] LATCH_CTL : 0x0
[RGU-PL] NONRST_REG2 : 0x0
[RGU-PL] DEBUG_CTL : 0x200f1
[RGU-PL] PMIC full rst : 0
[RGU-PL] g_rgu_status : 0 (0x0)
[RGU-PL] mtk_wdt_mode_config mode value=10, tmp : 22000010
LOG_RAW : [RGU-PL] PL P ON
[RGU-PL] Bypass pwrkey info : WDT does not trigger reboot
[RGU-PL] mtk_wdt_mode_config mode value=5d, tmp : 2200005d
[RGU-PL] mtk_wdt_reset_deglitch_enable : MTK_WDT_RSTDEG_EN1(8000a357), MTK_WDT_RSTDEG_EN2(800067d2)
[RGU-PL] rgu_update_reg : 0, bits
[RGU-PL] rgu_update_reg : 0, bits
[RGU-PL] mtk_wdt_init : MTK_WDT_DEBUG_CTL(0x200f1)
[RGU-PL] mtk_wdt_init : MTK_WDT_DEBUG_CTL2(0xff)
[RGU-PL] mtk_wdt_init : MTK_WDT_LATCH_CTL(0x1f71)
[RGU-PL] mtk_wdt_init : MTK_WDT_REQ_MODE(3f0033), MTK_WDT_REQ_IRQ_EN(3f0033)
[I2C] [i2c2]ADDR : 0x11009f8c,multi_DMA
[I2C] [i2c3]ADDR : 0x1100ff8c,multi_DMA
[I2C] [i2c4]ADDR : 0x11011f8c,multi_DMA
LOG_RAW : [RTC]rtc_enable_dcxo con = 0x486, osc32con = 0xde6c, sec = 0x2400
[RTC]get_frequency_meter : input=0x0, ouput=5
[RTC]get_frequency_meter : input=0x0, ouput=5
[RTC]get_frequency_meter : input=0x0, ouput=3973
LOG_RAW : [RTC]rtc_init#1 powerkey1 = 0xa357, powerkey2 = 0x67d2, without LPD
LOG_RAW : [RTC]bbpu = 0x1, con = 0x486, osc32con = 0xde6c, sec = 0x2400, yea = 0xc502
LOG_RAW : [RTC]rtc_init#2 powerkey1 = 0xa357, powerkey2 = 0x67d2
LOG_RAW : [RTC]rtc_init Writeif_unlock
LOG_RAW : [RTC]switch to dcxo
[RTC]eosc_cali : RG_FQMTR_CKSEL=0x4a
[RTC]get_frequency_meter : input=0xf, ouput=843
[RTC]eosc_cali : val=0x34b
[RTC]get_frequency_meter : input=0x7, ouput=716
[RTC]eosc_cali : val=0x2cc
[RTC]get_frequency_meter : input=0xb, ouput=779
[RTC]eosc_cali : val=0x30b
[RTC]get_frequency_meter : input=0xd, ouput=810
[RTC]eosc_cali : val=0x32a
[RTC]get_frequency_meter : input=0xc, ouput=794
[RTC]eosc_cali : val=0x31a
LOG_RAW : [RTC]EOSC cali val = 0xde4c
LOG_RAW : [RTC]RTC_SPAR0=0x0
LOG_RAW : [RTC]XO_XMODE_M = 1 , XO_EN32K_M = 1
LOG_RAW : [RTC]32k-less mode
LOG_RAW : [RTC]rtc_lpd_init RTC_CON=0x486
LOG_RAW : [md_power_down]SRCCLKENA Setting
LOG_RAW : [md_power_down]after 0x1006300, power off Modem
DCM_ALL : 0x7fff
LOG_RAW : 11-1.low_power init pass.
LOG_RAW : IN SAL_PMIC_HW_Reset_Enable
LOG_RAW : Configure pmic hw reset two key mode
LOG_RAW : IN SAL_PMIC_HW_Reset_Enable Done
LOG_RAW : 11-2.set the reset key pass.
LOG_RAW : mmc_init start.
boot channel set to : 0
[mmc_init] : msdc0 start in DA
[mmc_init] : msdc0, start mmc_init_host() in DA
[msdc_init] : msdc0 Host controller intialization start in DA
[SD0] Bus Width : 1
[SD0] SET_CLK(260kHz) : SCLK(259kHz) MODE(0) DDR(0) DIV(385) DS(0) RS(0)
[msdc_init] : msdc0 Host controller intialization done in DA
[mmc_init] : msdc0 start mmc_init_card() in DA
LOG_RAW : ===========================================================
[EXT_CSD] EXT_CSD rev. : v1.8 (MMCv)
[EXT_CSD] CSD struct rev. : v1.2
[EXT_CSD] Supported command sets : 1h
[EXT_CSD] HPI features : 1h
[EXT_CSD] BG operations support : 1h
[EXT_CSD] BG operations status : 0h
[EXT_CSD] Correct prg. sectors : 0h
[EXT_CSD] 1st init time after part. : 3000 ms
[EXT_CSD] Min. write perf.(DDR,52MH,8b) : 0h
[EXT_CSD] Min. read perf. (DDR,52MH,8b) : 0h
[EXT_CSD] TRIM timeout : 0 ms
[EXT_CSD] Secure feature support : 55h
[EXT_CSD] Secure erase timeout : 8100 ms
[EXT_CSD] Secure trim timeout : 5100 ms
[EXT_CSD] Access size : 3584 bytes
[EXT_CSD] HC erase unit size : 512 kbytes
[EXT_CSD] HC erase timeout : 300 ms
[EXT_CSD] HC write prot grp size : 8192 kbytes
[EXT_CSD] HC erase grp def. : 0h
[EXT_CSD] Reliable write sect count : 1h
[EXT_CSD] Sleep current (VCC) : 7h
[EXT_CSD] Sleep current (VCCQ) : 7h
[EXT_CSD] Sleep/awake timeout : 104857600 ns
[EXT_CSD] Sector count : 747c000h
[EXT_CSD] Min. WR Perf. (52MH,8b) : 0h
[EXT_CSD] Min. Read Perf.(52MH,8b) : 0h
[EXT_CSD] Min. WR Perf. (26MH,8b,52MH,4b) : 0h
[EXT_CSD] Min. Read Perf.(26MH,8b,52MH,4b) : 0h
[EXT_CSD] Min. WR Perf. (26MH,4b) : 0h
[EXT_CSD] Min. Read Perf.(26MH,4b) : 0h
[EXT_CSD] Power class : 0
[EXT_CSD] Power class(DDR,52MH,3.6V) : 0h
[EXT_CSD] Power class(DDR,52MH,1.9V) : 0h
[EXT_CSD] Power class(26MH,3.6V) : 0h
[EXT_CSD] Power class(52MH,3.6V) : 0h
[EXT_CSD] Power class(26MH,1.9V) : 0h
[EXT_CSD] Power class(52MH,1.9V) : 0h
[EXT_CSD] Part. switch timing : 5h
[EXT_CSD] Out-of-INTR busy timing : ah
[EXT_CSD] Card type : 57h
[EXT_CSD] Command set : 0h
[EXT_CSD] Command set rev. : 0h
[EXT_CSD] HS timing : 0h
[EXT_CSD] Bus width : 0h
[EXT_CSD] Erase memory content : 0h
[EXT_CSD] Partition config : 48h
[EXT_CSD] Boot partition size : 4096 kbytes
[EXT_CSD] Boot information : 7h
[EXT_CSD] Boot config protection : 0h
[EXT_CSD] Boot bus width : 2h
[EXT_CSD] Boot area write prot : 0h
[EXT_CSD] User area write prot : 0h
[EXT_CSD] FW configuration : 0h
[EXT_CSD] RPMB size : 16384 kbytes
[EXT_CSD] Write rel. setting : 1fh
[EXT_CSD] Write rel. parameter : 14h
[EXT_CSD] Start background ops : 0h
[EXT_CSD] Enable background ops : 2h
[EXT_CSD] H/W reset function : 1h
[EXT_CSD] HPI management : 0h
[EXT_CSD] Max. enhanced area size : 9b5h (20357120 kbytes)
[EXT_CSD] Part. support : 7h
[EXT_CSD] Part. attribute : 0h
[EXT_CSD] Part. setting : 0h
[EXT_CSD] General purpose 1 size : 0h (0 kbytes)
[EXT_CSD] General purpose 2 size : 0h (0 kbytes)
[EXT_CSD] General purpose 3 size : 0h (0 kbytes)
[EXT_CSD] General purpose 4 size : 0h (0 kbytes)
[EXT_CSD] Enh. user area size : 0h (0 kbytes)
[EXT_CSD] Enh. user area start : 0h
[EXT_CSD] Bad block mgmt mode : 0h
LOG_RAW : ===========================================================
[SD0] CMD(6) : RSP(8) = 0x900 AUTO(0)
switch : card status 0x900
LOG_RAW : [SD0] Switch to High-Speed mode!
[SD0] CMD(6) : RSP(8) = 0x900 AUTO(0)
switch : card status 0x900
[SD0] SET_CLK(260kHz) : SCLK(259kHz) MODE(2) DDR(1) DIV(192) DS(0) RS(0)
[SD0] Bus Width : 8
